In data transmission systems of the kind mentioned above, there is sometimes the risk that the bit rate regenerator locks in an incorrect phase position even if the frequency is correct per se. This means that the data detector of the system does not sample in the centre of the eye of the eye pattern of the transmitted signal, and the resulting bit error frequency will thus be high. As the phase-locked loop only sporadically receives relevant control information to get itself out of this state, correct synchronization can require a relatively long time. This is naturally a clear disadvantage for all systems of this kind and is especially troublesome in a system for two-way communication on the same channel, for example, i.e. alternating transmission and reception from each terminal. For such systems the synchronization sequence will of course be especially frequent.